Semiconductor circuits are implemented, for example, as CMOS (complementary metal oxide semiconductor) circuits and have transistors produced in MOS technology that form inversion channels of electrons or holes underneath a strip conductor. In this arrangement, two source/drain regions are formed opposite one another on both sides of a strip conductor as implantation areas in a semiconductor substrate. The strip conductor is used as gate electrode in the area of the transistor and controls the formation or prevention of an inversion channel by means of its electrical potential. The inversion channel extends closely underneath the semiconductor surface in the semiconductor substrate, to be precise underneath a gate oxide layer between the facing sides of the two source/drain regions of the transistor. The width of the channel in this case extends over the width of both source/drain areas along the direction of the extent of the strip conductor. Usually, both the length of the channel and the width of the channel in each case correspond to the optical limit of resolution F which can be achieved with the lithographic exposure device used in each case.
The transistor described above can be used, in particular, as storage transistor in nonvolatile semiconductor memories. In this case, it has between the strip conductor and the semiconductor substrate a charge-storing layer which spatially binds electrical charges that are scattered into this layer during the formation of an inversion channel and, as a result, can store digital information. In such storage circuits, there is a requirement for techniques that reduce the storage density, i.e. the number of storable information items per unit of substrate area. The object of miniaturizing electrical circuits also presents itself in the case of logic circuits.